Course Syllabus for "Digital Logic Laboratory"#
- Academic Year / Semester: 2025 / 1
- Course Type: Hands-On Laboratory
- Lab Session Duration: 3 hours / week
- Course Section Instructor: RSP
- Target Audience: Undergraduate Electrical Engineering Students, ECE / KMUTNB
Course Description#
This practical course introduces students to digital logic design through hands-on experiments. Using discrete logic devices, simulation software, and FPGA development boards, students will design, build, test, and debug digital logic systems from the ground up. Emphasis is placed on teamwork, engineering methodology, problem-solving, project-based learning, and documentation.
Course Objectives#
By the end of this laboratory course, students will be able to:
- Design, build, and test basic digital circuits using discrete logic ICs.
- Use modern FPGA design tools to develop, simulate, and implement digital circuits and systems on FPGA hardware.
- Write synthesizable VHDL code and corresponding testbenches to implement basic combinational and sequential logic circuits.
- Utilize IP cores and instantiate them in the design.
- Interface the I/O pins of the FPGA board with external circuits correctly and safely, avoiding potential hardware damage.
- Document and present functional prototypes clearly and effectively.
Online Tutorials for VHDL & FPGA:#
- Tutorial: FPGA Boards for Lab Sessions
- Tutorial: Intel Quartus Prime Lite (VHDL-based FPGA Design Flow)
- Tutorial: VHDL Coding & Logic Synthesis with Quartus Prime
- Tutorial: Tutorial: Debouncing Mechanical Switch Inputs & VHDL Simulation
- Tutorial: VHDL Modeling of D Flip-Flops, D Latches, and Shift Registers
- Tutorial: Clock Generation Using ALTPLL IP Core
- Tutorial: Rotary Encoder Interfacing
- Tutorial: Keypad Interfacing
- Tutorial: 4-Digit 7-Segment Display with Time Multiplexing Control
- Tutorial: PWM Signal Generation
Online Documentation:#
- Intel Quartus Prime Pro and Standard Software User Guides (Combined PDF for Standard Edition)
- Intel MAX 10 Device Handbook
- Intel MAX10 FPGA Configuration User Guide (PDF)
Weekly Lab Schedule#
Week 1: Introduction and Setup#
- Course Orientation and Lab Safety
- Introduction to electronics lab equipment: benchtop power supply, digital oscilloscopes, function generators, etc.
- Introduction to FPGA boards used for lab sessions (e.g. Terasic DE10-Lite)
- Installation and configuration of FPGA software (Intel/Altera Quartus Prime Lite)
- Web-based logic simulation / virtual prototyping software (e.g. EasyEDA, Tinkercad, CircuitVerse, EveryCircuit, and Wokwi)
Week 2 ~ 3: Discrete Logic Circuits#
- Breadboarding with 74HC/HCTxx series ICs
- Testing and measuring electrical parameters of logic ICs (74HC04, 74HC14)
- Schmitt-trigger inputs and hysteresis behavior
- Push buttons with pull-up/down resistors and switch debouncing
- Open-collector outputs and tri-state outputs
- Building logic circuits using 74xx ICs: MUXes and latches
- 555 timer pulse generation, edge detection with logic gates
- Online Documentation:
Week 4: FPGA Workflow Introduction#
- FPGA design tools overview
- Schematic capture vs. HDL-based design
- First FPGA design demo
- FPGA board I/O overview
- Logic debugging using an embedded logic analyzer and a digital oscilloscope
Week 5: Combinational Circuit Labs#
- VHDL modeling styles of combinational circuits
- I/O devices: slide switches, push buttons, LEDs, 7-segment displays
- Multiplexers, encoders, decoders
- Truth table and logic implementation using ROM lookup tables
- Online Documentation:
Week 6: Sequential Circuit Labs#
- Flip-flops and latches: timing and behavior
- Synchronous and asynchronous counters (binary, BCD)
- Shift registers and serial I/O
- Clock dividers, multi-clock domain considerations
- Finite State Machine (FSM) modeling in HDL
- FSM-based pattern detectors and sequence controllers
- Online Documentation:
Week 7: Practical Digital Signal Handling#
- Debouncing, filtering, and synchronization for real-world signals
- Rotary encoder decoding and quadrature signal handling
- PWM signal generation for LED dimming applications
- WS2812 RGB LED control using bit-banged protocol
- 4x4 keypad scan
- Multi-digit 7-segment control using the time-multiplexing method
- TM1637-based 7-segment display module
Week 8: Arithmetic Circuits and Mapping to FPGA Building Blocks#
- Binary adders, subtractors, and comparators
- Block RAMs: single-ported and dual-ported for ROM/RAM
- FIFO implementation and data buffering
- DSP blocks for arithmetic operations
- IP-based FPGA designs
Week 9: Data Communication & FPGA Board Interfacing#
- IR transmitter/receiver and signal modulation
- UART TX/RX communication
- I2C / SPI bus protocol
- On-chip ADC interface and analog signal reading
- VGA signaling
Week 10: Mini Project Kickoff#
- Mini-project proposal submission
- Project planning, hardware/software resource listing
- Discussion with the course instructor
Week 11 ~ 14: Mini Project Development#
- Weekly progress report & informal presentation
- Independent study and group work
Week 15: Final Mini-Project Demo, Wrap-up and Practical Exam#
- Final project demonstration and technical walkthrough
- Group Q&A and design justification
- Peer evaluation and team feedback
- Individual practical exam
Remarks:#
- Deliverable: Lab Report submission via Google Classroom (Only PDF format is accepted).
- One Submission Only: Only one person from each group should upload the report to avoid duplicates.
- Plagiarism Warning: Reports must reflect your own group's work. Academic integrity rules apply.
- Evidence: Include photos / screenshots / schematics / waveforms of working circuits or simulation output as proof of completion.
- Teamwork Hint: To manage time effectively, each group should divide roles so tasks can be performed in parallel. For example, one student can focus on wiring the circuit while the other prepares test setups, takes measurements, or documents the results.
- Home Preparation Tip: Each group should study and prepare their lab work from home before the lab session so that valuable lab time is spent on hands-on experimentation.
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Created: 2025-05-21 | Last Updated: 2025-06-12